This invention relates to a multipoint link data-transmission control system.
Generally, a multipoint link data-transmission system is known which controls the transmission of data among data-transmission devices connected, through a bidirectional transmission path, in a one-to-n fashion.
As is shown in FIG. 1, for example, a multiprocessor system has been developed which, through use of a plurality of processors 1a, 1b, . . . , 1n, hierarchically distributes their processing functions, as demanded by an information-processing system, as well as their loads, so as to enhance the overall processing capability.
In the multiprocessor system shown in FIG. 1, high-level processor 1a is connected to master transmission device 2a, and low-level processors 1b, . . . , 1n are connected to slave transmission devices 2b, . . . , 2n, respectively. Master transmission device 2a is connected via a bidirectional transmission path to slave transmission devices 2b, . . . , 2n of low-level processors 1b, . . . , 1n.
When data is transmitted from master transmission device 2a to slave transmission devices 2b, . . . , 2n, a header containing a destination address is attached to the transmission data. On the other hand, when data is transmitted from slave transmission devices 2b, . . . , 2n to master transmission device 2a or to other transmission devices, a header containing a source address is attached to the transmission data.
Of this type of system, in which data is transmitted from a master transmission device to a respective slave transmission device, three types are known.
The first system is a type in which the master transmission device simultaneously transmits data to the respective slave transmission devices, and, when necessary, this master device is able to inhibit the transmitting of data from all the slave transmission devices.
The second system is a type which transmits the same data message to a respective group into which slave transmission devices having the same processing function have been assembled. This system effectively controls the transmitting of data by the slave transmission devices performing the same processing.
The third system is a type which transmits data to a desired slave transmission device, by designating the corresponding destination address thereof.
When data is to be transmitted from the respective slave transmission device to the master transmission device, the master transmission device receives data, at a predetermined time interval, from the respective slave transmission device, on the basis of a time slot allotted thereto. Another transmission system allows one time slot to be shared among a plurality of slave transmission devices, through the slave transmission device transmitting data to the master transmission device, with a corresponding identification code attached to the message data. A practical application of such a multiprocessor is in, for example, an electronic telephone exchange system.
In such a system, if a fault develops in any of slave transmission devices 2b, . . . , 2n, and particularly in low-level processors 1b, . . . , 1n, master transmission device 2a (upper-level processor 1a) operates to prevent the normally-operating slave transmission devices (slave processors) from being disabled, by receiving data from the faulty slave transmission device and then discarding this data.
In this way, the conventional system provides a bar to efficient data-transmission control, since it is pointless to perform data communication with the faulty slave transmission device (slave processor).